Past and Future of Micro/Nano-Electronic Devices
Hiroshi Iwai Frontier Research Center, Tokyo Institute of Technology
Recently, CMOS downsizing has been accelerated very aggressively in both production and research levels, and even transistor operation of a 5 nm gate length CMOS was reported in conferences. However, many serious problems are expected for implementing small-geometry MOSFETs into large scale integrated circuits even for 32 and 22 nm technology nodes. It is still questionable if we can successfully introduce sub-10 nm CMOS LSIs into market, because the problems expected at this moment – such as Ion/Ioff ratio, current drive, variation in the electrical characteristics, concerns for the yield, reliability and manufacturing cost. Considering the above situation, we have conducted nano-CMOS studies in advance to provide possible solutions to the future expected problems. The conclusion obtained by the study was that, in the nano-CMOS era, aggressive introduction of new materials, processes, structures, and operation concepts is required to solve the problems. Especially, the thinning of the gate oxide is the bottleneck of the future down-scaling, and thus, new materials and process technologies which enable decrease in the EOT (Equivalent Oxide Thickness) value less than 0.5 nm are very important. Unfortunately, there are no candidates among the so-called ‘beyond CMOS’ or ‘Post Si’ new devices, which are believed to really replace CMOS transistors usable for the products of highly integrated circuits within 20 years. Thus, our opinion is that we need to still continue CMOS based transistors – CMOS with FinFET, and Nanowire FET – with ‘More Moore’ approach with combining that of ‘More than Moore’. Good news is that Si Nanowire FETs have been found to have very promising characteristics with high Ion/Ioff ratio and high drive current.
In this talk, future of nano-electronics is predicted, with the past story of micro-electronics as reference.
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Prof. Hiroshi Iwai has worked in the research and development of integrated circuit technology for more than 25 years in Toshiba. He is now a professor of Frontier Collaborative Research Center and Dept. of Electronics and Applied Physics, Interdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology, Yokohama, Japan.